However, between each byte, there is a 64uS delay so it means that no matter how high is the SPI clock, the data transfer takes minutes instead of seconds. That delay between bytes is based on how long it takes the chip to move the next byte from its internal buffer to the output shift registers. Sign up or log in Sign up using Google. USB peripherals can slow to a crawl if they only get a byte or few moved per frame. I have no idea how fast the USB transmit the data. I’ve used sample code provided with sample-dynamic.
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I’ve contacted FTDI support, they asked me to update the libraries to latest one which I didthen they would not provide further support.
I’ve ft23hl sample code provided with sample-dynamic.
Here is the configuration used: Also, I use master spi mode, write-only, there shouldn’t be any handshaking involved. There is vtdi a small delay between bytes, but nowhere near as large as 64us.
Why are you looking only at SPI side of your bridge?
I have no fy232hl how fast the USB transmit the data. There must be something to fix because there are numerous examples of people reaching high transfer rates.
FTDI FTH USB 12Mbps results – Black Mesa Labs
I heard back from FTDI guys, they suggest I don’t use their library but they didn’t clearly say that their lib was bugged. LatencyTimer would help, but it shows no difference no matter the value used 10, delay remain 64uS between consecutive bytes.
If the chip is clocked slowly, then this will show at the higher frequencies as a larger gap between bytes. Sign up using Facebook.
Are you sure that USB side is sending data fast enough?
Here is the configuration used:. Home Questions Tags Users Unanswered. How are you delivering the data to the drivers? I have it set tobut often for timing sensitive stuff, I have it lower 2 Try a slower clockrate first just to test and make sure the device is communicating correctly I assume you did, I’m just adding this in case someone else hasn’t tried that yet.
Sign up or log in Sign up using Google. This is what it looked like on my logic analyzer when I output 6 bytes at once at a clock rate of 5MHz.
That delay between bytes is based on how long it takes the chip to move the next byte from its internal buffer to the output shift ftri. Sign up using Email and Password.
Email Required, but never shown. Note that for SPI it doesn’t matter if the clock is stretched a little bit here and there since it is based on the edges of the clock signal read on one edge, propagate on the other.
However, between each byte, there is a 64uS delay so it means that no matter how high is the SPI clock, the data transfer ft232hk minutes instead of seconds. If you make a single call, add the appropriate chip select enable and disable flags see below.
usb – FTHL FTDI consecutive SPI bytes delay problem – Electrical Engineering Stack Exchange
I tried to ft22hl the problem you describe, but I wasn’t able to exactly. I imagined maybe playing with the channelConf. USB peripherals can slow to a crawl if they only get a byte or few moved per frame.
I did check with a logic analyser, the bytes are correctly sent out and the SPI clock match the settings. Latency timer really shouldn’t matter because that is simply a timeout before USB will send an incomplete packet. I check the SPI side because that’s the end of the line and I can easily check with logic analyzer. Here is some quick example code on how to send multiple data bytes in case it helps.